Formal Semantics and Verification of Network-Based Biocomputation Circuits

نویسندگان

چکیده

Abstract Network-Based Biocomputation Circuits (NBCs) offer a new paradigm for solving complex computational problems by utilizing biological agents that operate in parallel to explore manufactured planar devices. The approach can also have future applications diagnostics and medicine combining NBCs power with the ability interface material. To realize this potential, devices should be designed way ensures their correctness robust operation. For purpose, formal methods tools significant advantages allowing investigation of design limitations detection errors before manufacturing experimentation. Here we define model providing semantics NBC circuits. We present verification-based prototype tool assist enabling verification given design’s correctness. Our allows designs several NP-Complete problems, including Subset Sum, Exact Cover Satisfiability extended other implementations. is based on defining transition systems using temporal logic specifying proving properties checking. serve as starting point complexity studies systems.

برای دانلود باید عضویت طلایی داشته باشید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Design and formal verification of DZMBE+

In this paper, a new broadcast encryption scheme is presented based on threshold secret sharing and secure multiparty computation. This scheme is maintained to be dynamic in that a broadcaster can broadcast a message to any of the dynamic groups of users in the system and it is also fair in the sense that no cheater is able to gain an unfair advantage over other users. Another important feature...

متن کامل

Formal Verification and Testing of Asynchronous Circuits

PREFACE The advances in Very Large Scale Integration (VLSI) technology in the last years has led to faster, more complex and less consuming digital circuits. Another key point in the revolutionary changes produced in electronics has been the drastic cost reduction of manufactured products. The cost of a chip is mainly concentrated in the design, the layout mask (i.e. the \die") fabrication and ...

متن کامل

Formal verification of data-path circuits based on symbolic simulation

This paper presents a formal verification method based on logic simulation. In our method, using symbolic values even circuits which include data paths can be verified without abstruction of data paths. Our verifier extracts a transition relation from the state graph (given as a specification) which is expressed using symbolic values, and verifies based on simulation using those symbolic values...

متن کامل

Formal Verification of Distributed Mutual-exclusion Circuits

Distributed mutual-exclusion (DME) circuits are an interesting example of asynchronous circuits. They are composed of identical DME cells connected in a ring of arbitrary size. Each DME cell provides a connection point for one user, and all users compete for exclusive access to a shared resource. This paper reports about formal verification of two well-known DME circuit implementations. Externa...

متن کامل

Formal Verification of a Basic Circuits Library

We describe the results and status of a project aiming to provide a provably correct library of basic circuits. We use the theorem proving system PVS in order to prove circuits such as incrementers, adders, arithmetic units, multipliers, leading zero counters, shifters, and decoders. All specifications and proofs are available on the web.

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

ژورنال

عنوان ژورنال: Lecture Notes in Computer Science

سال: 2021

ISSN: ['1611-3349', '0302-9743']

DOI: https://doi.org/10.1007/978-3-030-67067-2_21